CY8C29466-24PVXI Datasheet Download

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CY8C29466-24PVXI
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Description:
[PSoC Programmable System-on-Chip]
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1401 K
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46 Pages
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Manufacturer:
CYPRESS [ CYPRESS SEMICONDUCTOR ]
PCB Prototype
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CY8C29466, CY8C29566
CY8C29666, CY8C29866
3.3 Analog System
The Analog System is composed of 12 configurable blocks, each
comprised of an opamp circuit allowing the creation of complex
analog signal flows. Analog peripherals are very flexible and can
be customized to support specific application requirements.
Some of the more common PSoC analog functions (most
available as user modules) are listed below.
Figure 3-2. Analog System Block Diagram
P0[7]
P0[5]
P0[3]
P0[1]
AGNDIn RefIn
P0[6]
P0[4]
P0[2]
P0[0]
P2[6]
Analog-to-digital converters (up to 4, with 6- to 14-bit resolution,
selectable as Incremental, Delta Sigma, and SAR)
Filters (2, 4, 6, and 8 pole band-pass, low-pass, and notch)
Amplifiers (up to 4, with selectable gain to 48x)
Instrumentation amplifiers (up to 2, with selectable gain to 93x)
Comparators (up to 4, with 16 selectable thresholds)
DACs (up to 4, with 6- to 9-bit resolution)
Multiplying DACs (up to 4, with 6- to 9-bit resolution)
High current output drivers (four with 30 mA drive as a Core
Resource)
1.3V reference (as a System Resource)
DTMF Dialer
Modulators
Correlators
Peak detectors
Many other topologies possible
P2[3]
P2[4]
P2[2]
P2[0]
P2[1]
Array Input Configuration
ACI0[1:0]
ACI1[1:0]
ACI2[1:0]
ACI3[1:0]
Block Array
ACB00
ASC10
ASD20
ACB01
ASD11
ASC21
ACB02
ASC12
ASD22
ACB03
ASD13
ASC23
Analog blocks are provided in columns of three, which includes
one CT (Continuous Time) and two SC (Switched Capacitor)
blocks, as shown in the figure below.
Interface to
Digital System
RefHi
RefLo
AGND
Analog Reference
Reference
Generators
AGNDIn
RefIn
Bandgap
M8C Interface (Address Bus, Data Bus, Etc.)
3.4 Additional System Resources
System Resources, some of which have been previously listed,
provide additional capability useful to complete systems.
Additional resources include a multiplier, decimator, switch mode
pump, low voltage detection, and power on reset. Statements
describing the merits of each system resource are below.
Digital clock dividers provide three customizable clock
frequencies for use in applications. The clocks can be routed
to both the digital and analog systems. Additional clocks can
be generated using digital PSoC blocks as clock dividers.
Multiply accumulate (MAC) provides fast 8-bit multiplier with
32-bit accumulate, to assist in general math and digital filters.
The decimator provides a custom hardware filter for digital
signal processing applications including the creation of Delta
Sigma ADCs.
The I2C module provides 100 and 400 kHz communication over
two wires. Slave, master, and multi-master modes are all
supported.
Document Number: 38-12013 Rev. *K
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