CY8C27643-24PVXI Datasheet Download

Part No.:
CY8C27643-24PVXI
Download:
Download Datasheet
Description:
[PSoC Programmable System-on-Chip]
File Size:
1531 K
Page:
53 Pages
Logo:
Manufacturer:
CYPRESS [ CYPRESS SEMICONDUCTOR ]
PCB Prototype
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CY8C27143, CY8C27243
CY8C27443, CY8C27543, CY8C27643
PSoC
®
Programmable System-on-Chip™
Features
Powerful Harvard Architecture Processor
M8C Processor Speeds to 24 MHz
8x8 Multiply, 32-Bit Accumulate
Low Power at High Speed
3.0 to 5.25V Operating Voltage
Operating Voltages Down to 1.0V Using On-Chip Switch
Mode Pump (SMP)
Industrial Temperature Range: -40°C to +85°C
Advanced Peripherals (PSoC
®
Blocks)
12 Rail-to-Rail Analog PSoC Blocks Provide:
• Up to 14-Bit ADCs
• Up to 9-Bit DACs
• Programmable Gain Amplifiers
• Programmable Filters and Comparators
8 Digital PSoC Blocks Provide:
• 8- to 32-Bit Timers, Counters, and PWMs
• CRC and PRS Modules
• Up to 2 Full-Duplex UARTs
• Multiple SPI™ Masters or Slaves
• Connectable to all GPIO Pins
Complex Peripherals by Combining Blocks
Precision, Programmable Clocking
Internal 2.5% 24/48 MHz Oscillator
24/48 MHz with Optional 32 kHz Crystal
Optional External Oscillator, up to 24 MHz
Internal Oscillator for Watchdog and Sleep
Flexible On-Chip Memory
16K Flash Program Storage 50,000 Erase/Write Cycles
256 Bytes SRAM Data Storage
In-System Serial Programming (ISSP)
Partial Flash Updates
Flexible Protection Modes
EEPROM Emulation in Flash
Programmable Pin Configurations
a. 25 mA Sink on all GPIO
b. Pull up, Pull down, High Z, Strong, or Open Drain Drive
Modes on all GPIO
c. Up to 12 Analog Inputs on GPIO
d. Four 30 mA Analog Outputs on GPIO
e. Configurable Interrupt on all GPIO
Additional System Resources
I2C Slave, Master, and Multi-Master to 400 kHz
Watchdog and Sleep Timers
User-Configurable Low Voltage Detection
Integrated Supervisory Circuit
On-Chip Precision Voltage Reference
Complete Development Tools
Free Development Software (PSoC Designer™)
Full Featured, In-Circuit Emulator and Programmer
Full Speed Emulation
Complex Breakpoint Structure
128K Trace Memory
Logic Block Diagram
Port 5
Port 4 Port 3
Port 2
Port 1
Port 0
PSoC
CORE
System Bus
Global Digital Interconnect
SRAM
256 Bytes
Interrupt
Controller
Analog
Drivers
Global Analog Interconnect
Flash 16K
Sleep and
Watchdog
SROM
CPUCore (M8C)
Multiple Clock Sources
(Includes IMO, ILO, PLL, and ECO)
DIGITAL SYSTEM
Digital
Block
Array
ANALOG SYSTEM
Analog
Block
Array
Analog
Ref.
Analog
Input
Muxing
Digital
Clocks
Multiply
Accum.
POR and LVD
Decimator
I
2
C
System Resets
Internal
Voltage
Ref.
Switch
Mode
Pump
SYSTEM RESOURCES
Cypress Semiconductor Corporation
Document Number: 38-12012 Rev. *M
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised April 17, 2009