CY8C21123-24SXI Datasheet Download

Part No.:
CY8C21123-24SXI
Download:
Download Datasheet
Description:
[PSoC Programmable System-on-Chip]
File Size:
943 K
Page:
36 Pages
Logo:
Manufacturer:
CYPRESS [ CYPRESS SEMICONDUCTOR ]
PCB Prototype
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CY8C21123, CY8C21223, CY8C21323
Table 5. Pin Definitions - CY8C21223 16-Pin COL
NC
P0[5], AI
P0[7], AI
Vdd
5
I2C SCL, P1[1]
Vss
2C SDA, P1[0]
P1[3]
6
7
8
AI, P0[3]
AI, P0[1]
I2C SCL, P1[7]
I2C SDA, P1[5]
16
15
14
13
COL
1
2
3
4
12
11
(Top View)
10
9
P0[4], VREF
XRES
P1[4]
P1[6]
Pin
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Type
Digital
IO
IO
IO
IO
IO
IO
Power
IO
IO
IO
Input
IO
Power
IO
IO
I
I
I
Analog
I
I
Pin
Name
P0[3]
P0[1]
P1[7]
P1[5]
P1[3]
P1[1]
Vss
P1[0]
P1[6]
P1[4]
XRES
P0[4]
Vdd
P0[7]
P0[5]
NC
EXTCLK
Description
Analog Column Mux Input
Analog Column Mux Input
I2C Serial Clock (SCL)
I2C Serial Data (SDA)
I2C Serial Clock (SCL), ISSP-SCLK
Ground Connection
I2C Serial Data (SDA), ISSP-SDATA
Figure 5. CY8C21223 16-Pin COL
Active High External Reset with Internal
Pull Down
V
REF
Supply Voltage
Analog Column Mux Input
Analog Column Mux Input
No Connect
LEGEND
A = Analog, I = Input, and O = Output.
Notes
3. These are the ISSP pins, which are not High Z at POR (Power On Reset). See the PSoC Programmable System-on-Chip Technical Reference Manual for details.
4. The center pad on the QFN package must be connected to ground (Vss) for best mechanical, thermal, and electrical performance. If not connected to ground, it
must be electrically floated and not connected to any other signal.
Document Number: 38-12022 Rev. *K
Page 8 of 36