CY7C64713-100AXC Datasheet Download

Part No.:
CY7C64713-100AXC
Download:
Download Datasheet
Description:
[EZ-USB FX1 USB Microcontroller Full Speed USB Peripheral Controller]
File Size:
1714 K
Page:
55 Pages
Logo:
Manufacturer:
CYPRESS [ CYPRESS SEMICONDUCTOR ]
PCB Prototype
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CY7C64713
EZ-USB FX1™ USB Microcontroller
Full Speed USB Peripheral Controller
Features
Integrated, Industry Standard 8051 with Enhanced Features:
Single Chip Integrated USB Transceiver, SIE, and Enhanced
8051 Microprocessor
Fit, Form, and Function Upgradable to the FX2LP
(CY7C68013A)
Up to 48 MHz clock rate
Four clocks for each instruction cycle
Two USARTS
Three counters or timers
Expanded interrupt system
Two data pointers
Pin compatible
Object code compatible
Functionally compatible (FX1 functionality is a Subset of the
FX2LP)
3.3V Operation with 5V Tolerant Inputs
Smart SIE
Vectored USB Interrupts
Separate Data Buffers for the Setup and DATA Portions of a
CONTROL Transfer
Integrated I
2
C Controller, Running at 100 or 400 KHz
48 MHz, 24 MHz, or 12 MHz 8051 Operation
Four Integrated FIFOs
Draws No More than 65 mA in Any Mode, Making the FX1
Suitable for Bus Powered Applications
Software: 8051 Runs from Internal RAM, which is:
Downloaded using USB
Loaded from EEPROM
External memory device (128 pin configuration only)
16 KBytes of On-Chip Code/Data RAM
Four Programmable BULK/INTERRUPT/ISOCHRONOUS
Endpoints
Brings glue and FIFOs inside for lower system cost
Automatic conversion to and from 16-bit buses
Master or slave operation
FIFOs can use externally supplied clock or asynchronous
strobes
Easy interface to ASIC and DSP ICs
Buffering options: double, triple, and quad
Additional Programmable (BULK/INTERRUPT) 64-byte
Endpoint
8- or 16-bit External Data Interface
Smart Media Standard ECC Generation
GPIF
Vectored for FIFO and GPIF Interrupts
Up to 40 General Purpose IOs (GPIO)
Four Package Options:
Allows direct connection to most parallel interfaces; 8- and
16-bit
Programmable waveform descriptors and configuration
registers to define waveforms
Supports multiple Ready (RDY) inputs and Control (CTL)
outputs
128 pin TQFP
100 pin TQFP
56 pin SSOP
56 pin QFN Pb-free
Cypress Semiconductor Corporation
Document #: 38-08039 Rev. *F
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised May 22, 2009