CY7C261-35WC Datasheet Download

Part No.:
CY7C261-35WC
Download:
Download Datasheet
Description:
[8K x 8 Power-Switched and Reprogrammable PROM]
File Size:
250 K
Page:
14 Pages
Logo:
Manufacturer:
CYPRESS [ CYPRESS SEMICONDUCTOR ]
PCB Prototype
 CY7C261-35WC Datasheet Page:1CY7C261-35WC Datasheet Page:2CY7C261-35WC Datasheet Page:3CY7C261-35WC Datasheet Page:4CY7C261-35WC Datasheet Page:6CY7C261-35WC Datasheet Page:7CY7C261-35WC Datasheet Page:8CY7C261-35WC Datasheet Page:9 
CY7C261
CY7C263/CY7C264
Switching Waveforms
[4]
t
PD
50%
t
PU
50%
V
CC
SUPPLY
CURRENT
A
0
- A
12
ADDRESS
CS
t
AA
O
0
- O
7
t
HZCS
t
ACS
Erasure Characteristics
Wavelengths of light less than 4000 angstroms begin to erase
the devices in the windowed package. For this reason, an
opaque label should be placed over the window if the PROM
is exposed to sunlight or fluorescent lighting for extended
periods of time.
The recommended dose of ultraviolet light for erasure is a
wavelength of 2537 angstroms for a minimum dose (UV
intensity multiplied by exposure time) of 25 Wsec/cm
2
. For an
ultraviolet lamp with a 12 mW/cm
2
power rating, the exposure time
would be approximately 35 minutes. The 7C261 or 7C263
needs to be within 1 inch of the lamp during erasure.
Permanent damage may result if the PROM is exposed to
high-intensity UV light for an extended period of time. 7258
Wsec/cm
2
is the recommended maximum dosage.
Operating Modes
Read
Read is the normal operating mode for programmed device. In
this mode, all signals are normal TTL levels. The PROM is
addressed with a 13-bit field, a chip select, (active LOW), is
applied to the CS pin, and the contents of the addressed location
appear on the data out pins.
Program, Program Inhibit, Program Verify
These modes are entered by placing a high voltage V
PP
on pin
19, with pins 18 and 20 set to V
ILP
. In this state, pin 21 becomes a
latch signal, allowing the upper 5 address bits to be latched into an
onboard register, pin 22 becomes an active LOW program (PGM)
signal and pin 23 becomes an active LOW verify (VFY) signal. Pins
22 and 23 should never be active LOW at the same time. The
PROGRAM mode exists when PGM is LOW, and VFY is HIGH. The
verify mode exists when the reverse is true, PGM HIGH and VFY
LOW and the program inhibit mode is entered with both PGM and
VFY HIGH. Program inhibit is specifically provided to allow data to be
placed on and removed from the data pins without conflict
Table 1. Mode Selection
Pin Function
[6, 7]
Read or Output Disable
Mode
Read
Output Disable
Program
Program Inhibit
Program Verify
Blank Check
Program
A
12
NA
A
12
A
12
V
ILP
V
ILP
V
ILP
V
ILP
A
11
V
PP
A
11
A
11
V
PP
V
PP
V
PP
V
PP
A
10
LATCH
A
10
A
10
V
ILP
V
ILP
V
ILP
V
ILP
A
9
PGM
A
9
A
9
V
ILP
V
IHP
V
IHP
V
IHP
A
8
VFY
A
8
A
8
V
IHP
V
IHP
V
ILP
V
ILP
CS
CS
V
IL
V
IH
V
ILP
V
ILP
V
ILP
V
ILP
O
7
–O
0
D
7
–D
0
O
7
–O
0
High Z
D
7
–D
0
High Z
O
7
–O
0
O
7
–O
0
Notes:
6. X = “don’t care” but not to exceed V
CC
±5%.
7. Addresses A
8
-A
12
must be latched through lines A
0
-A
4
in programming modes.
Document #: 38-04010 Rev. *B
Page 5 of 14