CY7C1041DV33-10ZSXI Datasheet Download

Part No.:
CY7C1041DV33-10ZSXI
Download:
Download Datasheet
Description:
[4-Mbit (256 K × 16) Static RAM]
File Size:
567 K
Page:
17 Pages
Logo:
Manufacturer:
CYPRESS [ CYPRESS SEMICONDUCTOR ]
PCB Prototype
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CY7C1041DV33
4-Mbit (256 K × 16) Static RAM
4-Mbit (256 K × 16) Static RAM
Features
Functional Description
The CY7C1041DV33 is a high performance CMOS Static RAM
organized as 256 K words by 16-bits. To write to the device, take
chip enable (CE) and write enable (WE) inputs LOW. If byte low
enable (BLE) is LOW, then data from I/O pins (I/O
0
to I/O
7
) is
written into the location specified on the address pins (A
0
to A
17
).
If byte high enable (BHE) is LOW, then data from I/O pins (I/O
8
to I/O
15
) is written into the location specified on the address pins
(A
0
to A
17
).
To read from the device, take chip enable (CE) and output enable
(OE) LOW while forcing the write enable (WE) HIGH. If BLE is
LOW, then data from the memory location specified by the
address pins appears on I/O
0
to I/O
7
. If BHE is LOW, then data
from memory appears on I/O
8
to I/O
15
. See the
for a complete description of read and write modes.
The input and output pins (I/O
0
to I/O
15
) are placed in a high
impedance state when the device is deselected (CE HIGH),
outputs are disabled (OE HIGH), BHE and BLE are disabled
(BHE, BLE HIGH), or during a write operation (CE LOW and WE
LOW).
The CY7C1041DV33 is available in a standard 44-pin 400-mil
wide SOJ and 44-pin TSOP II package with center power and
ground (revolutionary) pinout and a 48-ball fine-pitch ball grid
array (FBGA) package.
For best practice recommendations, refer to the Cypress
application note
Temperature ranges
Industrial: –40 °C to 85 °C
: –40 °C to 85 °C
Automotive-A
Automotive-E
: –40 °C to 125 °C
Pin and function compatible with CY7C1041CV33
High speed
t
AA
= 10 ns
Low active power
I
CC
= 90 mA at 10 ns (industrial)
Low CMOS standby power
I
SB2
= 10 mA
2.0 V data retention
Automatic power-down when deselected
TTL compatible inputs and outputs
Easy memory expansion with CE and OE features
Available in Pb-free 48-ball VFBGA, 44-pin (400-mil) molded
SOJ, and 44-pin TSOP II Packages
Logic Block Diagram
INPUT BUFFER
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
ROW DECODER
SENSE AMPS
IO
0
–IO
7
IO
8
–IO
15
256K × 16
COLUMN
DECODER
A
9
A
10
A
11
A
12
A
13
A
14
A
15
A
16
A
17
BHE
WE
CE
OE
BLE
Note
1. Automotive product information is preliminary.
Cypress Semiconductor Corporation
Document Number: 38-05473 Rev. *I
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised January 24, 2011