CY7C187-25PC Datasheet Download

Part No.:
CY7C187-25PC
Download:
Download Datasheet
Description:
[64K x 1 Static RAM]
File Size:
260 K
Page:
9 Pages
Logo:
Manufacturer:
CYPRESS [ CYPRESS SEMICONDUCTOR ]
PCB Prototype
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CY7C187
64K x 1 Static RAM
Features
• High speed
— 15 ns
• CMOS for optimum speed/power
• Low active power
— 495 mW
• Low standby power
— 110 mW
• TTL compatible inputs and outputs
• Automatic power-down when deselected
• Available in Pb-free and non Pb-free 22-pin (300-Mil)
Molded DIP and 24-pin (300-Mil) Molded SOJ
Functional Description
The CY7C187 is a high-performance CMOS static RAM
organized as 65,536 words x 1 bit. Easy memory expansion is
provided by an active LOW Chip Enable (CE) and tri-state
drivers. The CY7C187 has an automatic power-down feature,
reducing the power consumption by 56% when deselected.
Writing to the device is accomplished when the Chip Enable
(CE) and Write Enable (WE) inputs are both LOW. Data on the
input pin (D
IN
) is written into the memory location specified on
the address pins (A
0
through A
15
).
Reading the device is accomplished by taking the Chip Enable
(CE) LOW, while Write Enable (WE) remains HIGH. Under
these conditions, the contents of the memory location
specified on the address pin will appear on the data output
(D
OUT
) pin.
The output pin stays in high-impedance state when Chip
Enable (CE) is HIGH or Write Enable (WE) is LOW.
The CY7C187 utilizes a die coat to insure alpha immunity.
Logic Block Diagram
Pin Configurations
DI
INPUT BUFFER
A
0
A
1
A
2
A
3
A
4
A
5
NC
A
6
A
7
D
OUT
WE
GND
SOJ
Top View
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
C187–3
DIP
Top View
V
CC
A
15
A
14
A
13
A
12
NC
A
11
A
10
A
9
A
8
D
IN
CE
A
12
A
13
A
14
A
15
A
0
A
1
A
2
A
3
ROW DECODER
16K x 1
ARRAY
SENSE AMPS
DO
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
D
OUT
WE
GND
CE
COLUMN DECODER
POWER
DOWN
1
2
3
4
5
6
7
8
9
10
11
22
21
20
19
18
17
16
15
14
13
12
V
CC
A
15
A
14
A
13
A
12
A
11
A
10
A
9
A
8
D
IN
CE
WE
A
4
A
5
A
6
A
7
A
8
A
9
A
10
A
11
C187–1
C187–2
Selection Guide
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum CMOS Standby Current (mA)
-15
15
90
20
-25
25
70
20
-35
35
70
20
Cypress Semiconductor Corporation
Document #: 38-05044 Rev. *A
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised July 24, 2006