CY7C1041CV33-10ZXC Datasheet Download

Part No.:
CY7C1041CV33-10ZXC
Download:
Download Datasheet
Description:
[4-Mbit (256K x 16) Static RAM]
File Size:
428 K
Page:
14 Pages
Logo:
Manufacturer:
CYPRESS [ CYPRESS SEMICONDUCTOR ]
PCB Prototype
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CY7C1041CV33
4-Mbit (256K x 16) Static RAM
Features
Functional Description
The CY7C1041CV33 is a high performance CMOS static RAM
organized as 262,144 words by 16 bits.
To write to the device, take Chip Enable (CE) and Write Enable
(WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data
from IO pins (IO
0
through IO
7
), is written into the location
specified on the address pins (A
0
through A
17
). If Byte High
Enable (BHE) is LOW, then data from IO pins (IO
8
through IO
15
)
is written into the location specified on the address pins (A
0
through A
17
).
To read from the device, take Chip Enable (CE) and Output
Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If
Byte Low Enable (BLE) is LOW, then data from the memory
location specified by the address pins appear on IO
0
to IO
7
. If
Byte High Enable (BHE) is LOW, then data from memory
appears on IO
8
to IO
15
. For more information, see the
modes.
The input and output pins (IO
0
through IO
15
) are placed in a high
impedance state when the device is deselected (CE HIGH), the
outputs are disabled (OE HIGH), the BHE and BLE are disabled
(BHE, BLE HIGH), or during a write operation (CE LOW and WE
LOW).
For best practice recommendations, refer to the Cypress
application note
Temperature ranges
Commercial: 0°C to 70°C
Industrial: –40°C to 85°C
Automotive-A: –40°C to 85°C
Automotive-E: –40°C to 125°C
Pin and function compatible with CY7C1041BV33
High speed
t
AA
= 10 ns (Commercial, Industrial and Automotive-A)
t
AA
= 12 ns (Automotive-E)
Low active power
324 mW (max)
2.0V data retention
Automatic power down when deselected
TTL-compatible inputs and outputs
Easy memory expansion with CE and OE features
Available in Pb-free and non Pb-free 44-pin 400 Mil SOJ, 44-pin
TSOP II and 48-Ball FBGA packages
Logic Block Diagram
INPUT BUFFER
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
ROW DECODER
256K x 16
RAM Array
SENSE AMPS
IO
0
–IO
7
IO
8
–IO
15
COLUMN DECODER
BHE
WE
CE
OE
BLE
A
10
A
11
A
12
A
14
A
13
A
16
A
17
A
15
A
9
Cypress Semiconductor Corporation
Document Number: 38-05134 Rev. *I
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised February 14, 2008