CY7C1032-10JC Datasheet Download

Part No.:
CY7C1032-10JC
Download:
Download Datasheet
Description:
[64K x 18 Synchronous Cache RAM]
File Size:
283 K
Page:
13 Pages
Logo:
Manufacturer:
CYPRESS [ CYPRESS SEMICONDUCTOR ]
PCB Prototype
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CY7C1031
CY7C1032
Application Example
Figure 1
shows a 512-Kbyte secondary cache for the Pentium
microprocessor using four CY7C1031 cache RAMs.
66-MHz OSC
CLK
ADR
DATA
ADS
PENTIUM
PROCESSOR
512 KB
CLK
ADR
DATA
ADSP
ADSC
ADV
OE
WH, WL
2
WH, WL
WH, WL
WH, WL
7C1031
2
2
WH
2
,
WL
2
2
WH
3
,
WL
3
INTERFACE TO
MAIN MEMORY
CLK
ADR
CD
CACHE
TAG
DATA
MATCH
DIRTY
VALID
WH
1
,
CLK ADSC ADV OE WH
0
,
WL
1
WL
0
ADR
DATA
ADSP
CACHE
CONTROLLER
MATCH
DIRTY
VALID
Figure 1. Cache Using Four CY7C1031s
Pin Definitions
Signal Name
V
CC
V
CCQ
GND
V
SSQ
CLK
A
15
– A
0
ADSP
ADSC
WH
WL
ADV
OE
CS
DQ
15
–DQ
0
DP
1
–DP
0
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input/Output
Input/Output
Type
# of Pins
1
4
1
4
1
16
1
1
1
1
1
1
1
16
2
+5V
Power
+5V
or 3.3V (Outputs)
Ground
Ground (Outputs)
Clock
Address
Address Strobe from Processor
Address Strobe from Cache Controller
Write Enable – High Byte
Write Enable – Low Byte
Advance
Output Enable
Chip Select
Regular Data
Parity Data
Description
Document #: 38-05278 Rev. *A
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