CY7C144AV-25AC Datasheet Download

Part No.:
CY7C144AV-25AC
Download:
Download Datasheet
Description:
[3.3V 4K/8K/16K/32K x 8/9 Dual-Port Static RAM]
File Size:
546 K
Page:
20 Pages
Logo:
Manufacturer:
CYPRESS [ CYPRESS SEMICONDUCTOR ]
PCB Prototype
 CY7C144AV-25AC Datasheet Page:2CY7C144AV-25AC Datasheet Page:3CY7C144AV-25AC Datasheet Page:4CY7C144AV-25AC Datasheet Page:5CY7C144AV-25AC Datasheet Page:6CY7C144AV-25AC Datasheet Page:7CY7C144AV-25AC Datasheet Page:8CY7C144AV-25AC Datasheet Page:9 
CY7C138AV CY7C139AV CY7C144AV CY7C145AV CY7C006AV CY7C016AV CY7C007AV CY7C017AV 3.3V 4K/8K/16K/32K x 8/9
Dual-Port Static RAM
CY7C138AV/144AV/006AV
CY7C139AV/145AV/016AV
CY7C007AV/017AV
3.3V 4K/8K/16K/32K x 8/9
Dual-Port Static RAM
Features
• True Dual-Ported memory cells which allow
simultaneous access of the same memory location
• 4K/8K/16K/32K x 8 organizations
(CY7C0138AV/144AV/006AV/007AV)
• 4K/8K/16K/32K x 9 organizations
(CY7C0139AV/145AV/016AV/017AV)
• 0.35-micron CMOS for optimum speed/power
• High-speed access: 20/25 ns
• Low operating power
— Active: I
CC
= 115 mA (typical)
— Standby: I
SB3
= 10
µA
(typical)
• Fully asynchronous operation
• Automatic power-down
• Expandable data bus to 16/18 bits or more using Master/
Slave chip select when using more than one device
• On-chip arbitration logic
• Semaphores included to permit software handshaking
between ports
• INT flag for port-to-port communication
• Pin select for Master or Slave
• Commercial and Industrial Temperature Ranges
• Available in 68-pin PLCC (all) and 64-pin TQFP
(7C006AV & 7C144AV)
• Pb-Free packages available
Logic Block Diagram
R/W
L
CE
L
OE
L
R/W
R
CE
R
OE
R
I/O
0L
–I/O
7/8L
8/9
8/9
I/O
Control
I/O
Control
I/O
0R
–I/O
7/8R
A
0L
–A
11–14L
12–15
Address
Decode
12–15
True Dual-Ported
RAM Array
Address
Decode
12–15
12–15
A
0R
–A
11–14R
A
0L
–A
11–14L
CE
L
OE
L
R/W
L
SEM
L
BUSY
L
INT
L
Interrupt
Semaphore
Arbitration
A
0R
–A
11–14R
CE
R
OE
R
R/W
R
SEM
R
BUSY
R
INT
R
M/S
For the most recent information, visit the Cypress web site at www.cypress.com
Notes:
1. I/O
0
–I/O
7
for x8 devices; I/O
0
–I/O
8
for x9 devices.
2. A
0
–A
11
for 4K devices; A
0
–A
12
for 8K devices; A
0
–A
13
for 16K devices; A
0
–A
14
for 32K devices;
3. BUSY is an output in master mode and an input in slave mode.
Cypress Semiconductor Corporation
Document #: 38-06051 Rev. *C
3901 North First Street
San Jose
CA 95134 • 408-943-2600
Revised June 6, 2005