CY62146EV30LL-45ZSXI Datasheet Download

Part No.:
CY62146EV30LL-45ZSXI
Download:
Download Datasheet
Description:
[4-Mbit (256K x 16) Static RAM]
File Size:
444 K
Page:
13 Pages
Logo:
Manufacturer:
CYPRESS [ CYPRESS SEMICONDUCTOR ]
PCB Prototype
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CY62146EV30 MoBL
®
4-Mbit (256K x 16) Static RAM
Features
Very High Speed: 45 ns
Temperature Ranges
Industrial: –40°C to +85°C
Automotive-A: –40°C to +85°C
Wide Voltage Range: 2.20V–3.60V
Pin Compatible with CY62146DV30
Ultra Low Standby Power
Typical standby current: 1
μA
Maximum standby current: 7
μA
Ultra Low Active Power
Typical active current: 2 mA at f = 1 MHz
Easy Memory Expansion with CE and OE Features
Automatic Power Down when Deselected
CMOS for Optimum Speed and Power
Available in a Pb-free 48-ball VFBGA and 44-pin TSOP II
Packages
current. Ultra low active current is ideal for providing More
Battery Life™ (MoBL
®
) in portable applications such as cellular
telephones. The device also has an automatic power down
feature that significantly reduces power consumption by 80
percent when addresses are not toggling.The device can also be
put into standby mode reducing power consumption by more
than 99 percent when deselected (CE HIGH). The input and
output pins (I/O
0
through I/O
15
) are placed in a high impedance
state when: the device is deselected (CE HIGH), outputs are
disabled (OE HIGH), both Byte High Enable and Byte Low
Enable are disabled (BHE, BLE HIGH), or a write operation is in
progress (CE LOW and WE LOW).
To write to the device, take Chip Enable (CE ) and Write Enable
(WE) input LOW. If Byte Low Enable (BLE) is LOW, then data
from I/O pins (I/O
0
through I/O
7
) is written into the location
specified on the address pins (A
0
through A
17
). If Byte High
Enable (BHE) is LOW, then data from the I/O pins (I/O
8
through
I/O
15
) is written into the location specified on the address pins
(A
0
through A
17
).
To read from the device, take Chip Enable (CE) and Output
Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If
Byte Low Enable (BLE) is LOW, then data from the memory
location specified by the address pins appears on I/O
0
to I/O
7
. If
Byte High Enable (BHE) is LOW, then data from memory
appears on I/O
8
to I/O
15
. See the
complete description of read and write modes.
For best practice recommendations, refer to the Cypress
application note
Functional Description
The CY62146EV30 is a high performance CMOS static RAM
organized as 256K words by 16 bits. This device features an
advanced circuit design designed to provide an ultra low active
Logic Block Diagram
DATA IN DRIVERS
A
10
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
ROW DECODER
256K x 16
RAM Array
SENSE AMPS
IO
0
–IO
7
IO
8
–IO
15
COLUMN DECODER
BHE
WE
CE
OE
BLE
A
11
A
12
A
13
A
15
A
14
A
16
A
17
Cypress Semiconductor Corporation
Document Number: 38-05567 Rev. *D
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised March 23, 2009