CY62157EV30LL-45ZSXI Datasheet Download

Part No.:
CY62157EV30LL-45ZSXI
Download:
Download Datasheet
Description:
[8-Mbit (512 K x 16) Static RAM Automatic power down when deselected]
File Size:
459 K
Page:
21 Pages
Logo:
Manufacturer:
CYPRESS [ CYPRESS SEMICONDUCTOR ]
PCB Prototype
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CY62157EV30 MoBL
®
Maximum Ratings
Exceeding the maximum ratings may impair the useful life of the
device. User guidelines are not tested.
Storage Temperature ............................. –65 °C to + 150 °C
Ambient Temperature with
Power Applied ........................................ –55 °C to + 125 °C
Supply Voltage to Ground
Potential .............................–0.3 V to 3.9 V (V
CCmax
+ 0.3 V)
DC Voltage Applied to Outputs
in High Z State
............–0.3 V to 3.9 V (V
CCmax
+ 0.3 V)
DC Input Voltage
Output Current into Outputs (LOW) ............................20 mA
Static Discharge Voltage ........................................> 2001 V
(MIL-STD-883, Method 3015)
Latch Up Current ...................................................> 200 mA
Operating Range
Device
Range
Ambient
Temperature
V
CC
CY62157EV30LL Industrial/ –40 °C to +85 °C 2.2 V to 3.6 V
Auto-A
Auto-E
–40 °C to +125 °C
........ –0.3 V to 3.9 V (V
CC max
+ 0.3 V)
Electrical Characteristics
Over the Operating Range
Parameter
V
OH
V
OL
V
IH
V
IL
I
IX
I
OZ
I
CC
Description
Output HIGH voltage
Output LOW voltage
Input HIGH voltage
Input LOW voltage
Input leakage current
V
CC
operating supply
current
Test Conditions
I
OH
= –0.1 mA
I
OH
= –1.0 mA, V
CC
> 2.70 V
I
OL
= 0.1 mA
I
OL
= 2.1 mA, V
CC
> 2.70 V
V
CC
= 2.2 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
V
CC
= 2.2 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
GND < V
I
< V
CC
f = f
max
= 1/t
RC
f = 1 MHz
V
CC
= V
CCmax
I
OUT
= 0 mA
CMOS levels
Output leakage current GND < V
O
< V
CC
, Output Disabled
45 ns (Industrial/
Auto-A)
Min
2.0
2.4
1.8
2.2
–0.3
–0.3
–1
–1
Typ
18
1.8
2
Max
0.4
0.4
V
CC
+ 0.3
V
CC
+ 0.3
0.6
0.8
+1
+1
25
3
8
2.0
2.4
1.8
2.2
–0.3
–0.3
–4
–4
55 ns (Auto-E)
Min
Typ
18
1.8
2
Max
0.4
0.4
V
CC
+ 0.3
V
CC
+ 0.3
0.6
0.8
+4
+4
35
4
30
mA
A
V
V
V
V
V
V
V
V
A
A
Unit
I
SB1 [9]
Automatic CE power CE
1
> V
CC
0.2
V or CE
2
< 0.2 V
down current — CMOS or (BHE and BLE) > V
CC
– 0.2 V,
inputs
V
IN
> V
CC
– 0.2 V, V
IN
< 0.2 V
f = f
max
(Address and Data Only),
f = 0 (OE and WE), V
CC
= 3.60 V
Automatic CE power CE
1
> V
CC
– 0.2 V or CE
2
< 0.2 V
down current — CMOS or (BHE and BLE) > V
CC
– 0.2 V,
inputs
V
IN
> V
CC
– 0.2 V or V
IN
< 0.2 V,
f = 0, V
CC
= 3.60 V
I
SB2 [9]
2
8
2
30
A
Notes
5. V
IL(min)
= –2.0 V for pulse durations less than 20 ns.
6. V
IH(max)
= V
CC
+ 0.75 V for pulse durations less than 20 ns.
7. Full device AC operation assumes a 100
s
ramp time from 0 to V
cc
(min) and 200
s
wait time after V
CC
stabilization.
8. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
CC
= V
CC(typ)
, T
A
= 25 °C.
9. Chip enables (CE
1
and CE
2
), byte enables (BHE and BLE) and BYTE (48-pin TSOP I only) need to be tied to CMOS levels to meet the I
SB1
/ I
SB2
/ I
CCDR
spec. Other
inputs can be left floating.
Document #: 38-05445 Rev. *I
Page 4 of 21