CY62157EV30LL-45ZSXI Datasheet Download

Part No.:
CY62157EV30LL-45ZSXI
Download:
Download Datasheet
Description:
[8-Mbit (512 K x 16) Static RAM Automatic power down when deselected]
File Size:
459 K
Page:
21 Pages
Logo:
Manufacturer:
CYPRESS [ CYPRESS SEMICONDUCTOR ]
PCB Prototype
 CY62157EV30LL-45ZSXI Datasheet Page:2CY62157EV30LL-45ZSXI Datasheet Page:3CY62157EV30LL-45ZSXI Datasheet Page:4CY62157EV30LL-45ZSXI Datasheet Page:5CY62157EV30LL-45ZSXI Datasheet Page:6CY62157EV30LL-45ZSXI Datasheet Page:7CY62157EV30LL-45ZSXI Datasheet Page:8CY62157EV30LL-45ZSXI Datasheet Page:9 
CY62157EV30 MoBL
®
8-Mbit (512 K × 16) Static RAM
8-Mbit (512 K × 16) Static RAM
Features
Functional Description
The CY62157EV30 is a high performance CMOS static RAM
organized as 512K words by 16 bits. This device features
advanced circuit design to provide ultra low active current. This
is ideal for providing More Battery Life (MoBL
®
) in portable
applications such as cellular telephones. The device also has an
automatic power down feature that significantly reduces power
consumption when addresses are not toggling. Place the device
into standby mode when deselected (CE
1
HIGH or CE
2
LOW or
both BHE and BLE are HIGH). The input or output pins (I/O
0
through I/O
15
) are placed in a high impedance state when the
device is deselected (CE
1
HIGH or CE
2
LOW), the outputs are
disabled (OE HIGH), Byte High Enable and Byte Low Enable are
disabled (BHE, BLE HIGH), or a write operation is active (CE
1
LOW, CE
2
HIGH and WE LOW).
To write to the device, take Chip Enable (CE
1
LOW and CE
2
HIGH) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O
0
through I/O
7
) is
written into the location specified on the address pins (A
0
through
A
18
). If Byte High Enable (BHE) is LOW, then data from I/O pins
(I/O
8
through I/O
15
) is written into the location specified on the
address pins (A
0
through A
18
).
To read from the device, take Chip Enable (CE
1
LOW and CE
2
HIGH) and Output Enable (OE) LOW while forcing the Write
Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data
from the memory location specified by the address pins appear
on I/O
0
to I/O
7
. If Byte High Enable (BHE) is LOW, then data from
memory appears on I/O
8
to I/O
15
. See
for a complete description of read and write modes.
Thin small outline package (TSOP) I package configurable as
512 K × 16 or 1 M × 8 static RAM (SRAM)
High speed: 45 ns
Temperature ranges
Industrial: –40 °C to +85 °C
Automotive-A: –40 °C to +85 °C
Automotive-E: –40 °C to +125 °C
Wide voltage range: 2.20 V to 3.60 V
Pin compatible with CY62157DV30
Ultra low standby power
Typical standby current: 2
A
Maximum standby current: 8
A
(Industrial)
Ultra low active power
Typical active current: 1.8 mA at f = 1 MHz
Easy memory expansion with CE
1
, CE
2
, and OE features
Automatic power down when deselected
Complementary Metal Oxide Semiconductor (CMOS) for
optimum speed and power
Available in Pb-free and non Pb-free 48-ball very fine-pitch ball
grid array (VFBGA), Pb-free 44-pin TSOP II and 48-pin TSOP I
packages
Logic Block Diagram
DATA IN DRIVERS
A
10
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
ROW DECODER
512 K × 16/1 M x 8
RAM Array
SENSE AMPS
I/O
0
–I/O
7
I/O
8
–I/O
15
COLUMN DECODER
CE
2
BYTE
BHE
WE
OE
BLE
A
11
A
12
A
13
A
14
A
15
A
16
A
17
A
18
Power Down
Circuit
CE
1
BHE
BLE
CE
2
CE
1
Cypress Semiconductor Corporation
Document #: 38-05445 Rev. *I
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised May 30, 2011