CY2310ANZPVC-1 Datasheet Download

Part No.:
CY2310ANZPVC-1
Download:
Download Datasheet
Description:
[3.3V SDRAM Buffer for Mobile PCs with 4 SO-DIMMs]
File Size:
188 K
Page:
8 Pages
Logo:
Manufacturer:
CYPRESS [ CYPRESS SEMICONDUCTOR ]
PCB Prototype
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1CY2310NZCY2310
NZCY2310ANZ
CY2310ANZ
3.3V SDRAM Buffer for Mobile PCs
with 4 SO-DIMMs
Features
• One input to 10 output buffer/driver
• Supports up to four SDRAM SO-DIMMs
• Two additional outputs for feedback
• Serial interface for output control
• Low skew outputs
• Up to 100-MHz operation
• Multiple V
DD
and V
SS
pins for noise reduction
• Dedicated OE pin for testing
• Space-saving 28-pin SSOP package
• 3.3V operation
Functional Description
The CY2310ANZ is a 3.3V buffer designed to distribute
high-speed clocks in mobile PC applications. The part has 10
outputs, 8 of which can be used to drive up to four SDRAM
SO-DIMMs, and the remaining can be used for external
feedback to a PLL. The device operates at 3.3V and outputs
can run up to 100 MHz, thus making it compatible with
Pentium II
®
processors. The CY2310ANZ can be used in
conjunction with the CY2281 or similar clock synthesizer for a
full Pentium II motherboard solution.
The CY2310ANZ also includes a serial interface which can
enable or disable each output clock. On power-up, all output
clocks are enabled. A separate Output Enable pin facilitates
testing on ATE.
Block Diagram
Pin Configuration
28-pin SSOP
Top View
SDRAM0
SDRAM1
SDRAM2
SDRAM3
Serial Interface
Decoding
SDRAM4
SDRAM5
SDRAM6
SDRAM7
SDRAM8
SDRAM9
V
DD
SDRAM0
SDRAM1
V
SS
V
DD
SDRAM2
SDRAM3
V
SS
BUF_IN
V
DD
SDRAM8
V
SS
V
DDIIC
SDATA
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
BUF_IN
SDATA
SCLOCK
V
DD
SDRAM7
SDRAM6
V
SS
V
DD
SDRAM5
SDRAM4
V
SS
OE
V
DD
SDRAM9
V
SS
V
SSIIC
SCLOCK
OE
Cypress Semiconductor Corporation
Document #: 38-07142 Rev. *B
3901 North First Street
San Jose
,
CA 95134
408-943-2600
Revised January 19, 2005