CY22381FXC Datasheet Download

Part No.:
CY22381FXC
Download:
Download Datasheet
Description:
[Three-PLL General Purpose FLASH Programmable Clock Generator]
File Size:
346 K
Page:
9 Pages
Logo:
Manufacturer:
CYPRESS [ CYPRESS SEMICONDUCTOR ]
PCB Prototype
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CY22381
Three-PLL General Purpose FLASH
Programmable Clock Generator
Features
Three integrated phase-locked loops
Ultra-wide divide counters (eight-bit Q, eleven-bit P, and
seven-bit post divide)
Improved linear crystal load capacitors
Flash programmability
Field programmability
Low-jitter, high-accuracy outputs
Power-management options (Shutdown, OE, Suspend)
Configurable crystal drive strength
Frequency select option through external LVTTL Input
3.3V operation
Eight-pin SOIC package
CyClocks RT™ support
Improves frequency accuracy over temperature, age, process,
and initial offset
Non-volatile programming enables easy customization,
ultra-fast turnaround, performance tweaking, design timing
margin testing, inventory control, lower part count, and more
secure product supply. Can also be programmed multiple times
which reduces programming errors and provides an easy
upgrade path for existing designs
In-house programming of samples and prototype quantities is
available using the CY3672 FTG development Kit. Production
quantities are available through Cypress’s value-added
distribution partners or by using third party programmers from
BP Microsystems, HiLo Systems, and others.
Performance suitable for high-end multimedia,
communications, industrial, A/D converters, and consumer
applications
Supports numerous low-power application schemes and
reduces EMI by allowing unused outputs to be turned off
Adjust crystal drive strength for compatibility with virtually all
crystals
External frequency select option for PLL1, CLKA, and CLKB
Industry standard supply voltage
Industry standard packaging saves on board space
Easy-to-use software support for design entry
Benefits
Generates up to three unique frequencies on three outputs up
to 200 MHz from an external source. Functional upgrade for
current CY2081 family.
Allows for 0 ppm frequency generation and frequency
conversion under the most demanding applications
Logic Block Diagram
XTALIN
XTALOUT
OSC.
PLL1
CONFIGURATION
FLASH
11-BIT P
8-BIT Q
4×3
Crosspoint
Switch
Divider
7-BIT
CLKC
PLL2
SHUTDOWN/OE
FS/SUSPEND
11-BIT P
8-BIT Q
Divider
7-BIT
CLKB
PLL3
11-BIT P
8-BIT Q
Divider
7-BIT
CLKA
Cypress Semiconductor Corporation
Document #: 38-07012 Rev. *E
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised October 10, 2008